28nm FPGA HSTL IO Standard Green RS Flip Flop Design for AI Based Processor
DOI:
https://doi.org/10.26438/ijcse/v7i8.305308Keywords:
FPGA, AI, HSTL, flip flop, 28nmAbstract
The flexible, reusable nature of FPGAs makes them a great fit for different applications, from driver development to data processing acceleration. FPGAs can be programmed for different kinds of workloads, from signal processing to deep learning and big data analytics. In this article, we focus on the use of FPGAs for Artificial Intelligence (AI) workload acceleration. To make this thing happen we have design FPGA based Flip Flop Design for AI Based Processor. Here we have designed energy efficient RS Flip Flop. In consideration of technology upgradation, we have used 5G frequency for calculating total power consumption from 1GHZ to 5 GHZ. We have used two different IO standard HSTL_I_12 and HSTL_II_18 with different voltage (0.970, 1.009, 0.986 and 0.998 Volt). During the experiment we have found by applying HSTL_I_12 we have reduced our total power consumption by 44.87% which is significant among all the analysis.
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