Design and Implementation of Low Power and Area Efficient 4 Bit ALU Using MGDI Technique
Keywords:
MGDI, PTL, CMOS, Switching Delay, Power dissipationAbstract
In this paper, the design of a 4-Bit Arithmetic Logic Unit (ALU) using Modified Gate Diffusion Input technique is being done which is implemented using minimum transistor full adder and also adapts hardware reuse method which has advantages of minimum transistors requirement, more switching speed and low power consumption with respect to the conventional CMOS techniques. 4-Bit Arithmetic Logic Unit (ALU) is being implemented with MGDI technique in DSCH 3.5 and layout generated in Microwind tool. The Simulation is done using 65 nm technology at 1.2 v supply voltage The results show that the proposed design consume less power uses less number of transistors, while achieving full swing operation compared to previous work
References
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