A Study on γ - Optimization Parameter and Phase Margin of Fourth Order Phase-Locked Loop

Authors

  • Borah M Department of Electronics & Communication Technology, Gauhati University, Guwahati, Assam, India
  • Bezboruah T Department of Electronics & Communication Technology, Gauhati University, Guwahati, Assam, India

DOI:

https://doi.org/10.26438/ijcse/v6i12.146150

Keywords:

Bandwidth, gamma optimization parameter, lock time, phase margin, stability

Abstract

A 4th order phase-locked loop model by considering two different filter configurations in the loop have been developed and behavioral simulation has been performed on MATLAB platform to study the impact of gamma-optimization parameter on it and also to study the stability of the system in terms of phase margin. We have also investigated the bandwidth and lock time of the system.

References

[1] B. K. Mishra, S Save and S Patil, “Design and Analysis of Second and Third Order PLL at 450MHz”, International Journal of VLSI design & Communication Systems (VLSICS), Vol.2, No.1, pp 97-113, March 2011.

[2] S. Goldman, “Phase locked loop engineering handbook for integrated circuits”, Artech House, 2007.

[3] R. Best, Phase Lock Loops: Theory, Design and Applications, Prentice-Hall, 2001.

[4] Clock Conditioner Owner’s manual, First Edition, winter (2006)

[5] Dean Banerjee, “PLL Performance Simulation and Design” 4th edition, Dogear, (2006).

[6] Lin Jia, Kiat Seng Yeo Jian Guo Ma, Manh Anh Do, Xiao Peng Yu, “Noise transfer characteristics and design techniques of a frequency synthesizer”, Analog Integr. Circ. Sig. Process, Vol. 52, pp. - 89-97, 2007.

[7] K. Kalita, and T. Bezboruah, “Impact of  - optimization parameters and phase margin on closed loop gain of phase-locked loop”, International Journal of Electronics and Communication Engineering, Vol. 6, No. 3, pp. 225-231, 2013.

Downloads

Published

2018-12-31
CITATION
DOI: 10.26438/ijcse/v6i12.146150
Published: 2018-12-31

How to Cite

[1]
M. Borah and T. Bezboruah, “A Study on γ - Optimization Parameter and Phase Margin of Fourth Order Phase-Locked Loop”, Int. J. Comp. Sci. Eng., vol. 6, no. 12, pp. 146–150, Dec. 2018.

Issue

Section

Research Article