Design and Verification of Five Port Router for Network on Chip Using VERILOG

Authors

  • K Venkatasuresh Dept. Of Ece, Srts College,Kadapa
  • K Bala Dept. Of Ece, Srts College,Kadapa

Keywords:

FIFO, Fsm, Network-On-Chip, Register blocks, Simulation, Router

Abstract

The focus of this Paper is the actual implementation of Network Router and verifies the functionality of the five port router for network on chip using the latest verification methodologies, Hardware Verification Languages and EDA tools and qualifies the Design for Synthesis an implementation. This Router design contains Four output ports and one input port, it is packet based Protocol. This Design consists Registers, Fsm and FIFO’s.For larger networks, where a direct-mapped approach is not feasible due to FPGA resource limitations, a virtualized time multiplexed approach was used. Compared to the provided software reference implementation, our direct-mapped approach achieves three orders of magnitude speedup, while our virtualized time multiplexed approach achieves one to two orders of magnitude speedup, depending on the network and router configuration.

References

“D. Chiou, “MEMOCODE 2011 Hardware/Software CoDesign Contest”, https://ramp.ece.utexas.edu/redmine/ Attachments/ DesignContest.pdf

Blue spec Inc, http://www.bluespec.com

Xilinx, “ML605 Hardware User Guide”,

http://www.xilinx.com/support/documentation /boards and kits/ug534.pdf

Xilinx, “LogiCORE IP Processor Local Bus (PLB) v4.6”,

http://www.xilinx.com/support/documentation/ip documentation/plb v46.pdf

“Application Note: Using the Router Interface to Communicate Motorola, ANN91/D Rev. 1, 01/2001.

Cisco Router OSPF: Design& Implementation Guide, Publisher: McGraw-Hill

“Nortel Secure Router 4134”, Nortel Pvt.Ltd.

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Published

2014-09-30

How to Cite

[1]
K. Venkatasuresh and K. Bala, “Design and Verification of Five Port Router for Network on Chip Using VERILOG”, Int. J. Comp. Sci. Eng., vol. 2, no. 9, pp. 78–80, Sep. 2014.

Issue

Vol. 2 No. 9 (2014): IJCSE September Edition

Section

Research Article

License

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