1.
Nandhini M, Muralidharan V, Varatharaj M. Power Efficient for DPA Resistat Flip Flop Using TDPL Inverter in Reverse Logic. Int. J. Comp. Sci. Eng. [Internet]. 2014 Apr. 30 [cited 2026 Feb. 2];2(4):131-5. Available from: https://ijcse.isroset.org/index.php/j/article/view/114