NIKHIL, KM; VEENA, MB. Efficient Simulation of SoC based on Design Checkpointing for Efficient Debugging. International Journal of Computer Sciences and Engineering, [S. l.], v. 5, n. 7, p. 56–60, 2025. DOI: 10.26438/ijcse/v5i7.5660. Disponível em: https://ijcse.isroset.org/index.php/j/article/view/1546. Acesso em: 2 feb. 2026.