GOPAL, D.Venu; REDDY, M. Mohan. Design and Implementation of a Fast Unsigned 32-bit Multiplier Using Verilog HDL. International Journal of Computer Sciences and Engineering, [S. l.], v. 2, n. 5, p. 29–31, 2014. Disponível em: https://ijcse.isroset.org/index.php/j/article/view/146. Acesso em: 2 feb. 2026.