JEEJA, Jaculine Let R B; BHARATH P; VARATHARAJ M. Power Efficient High Speed Domino Circuit Using Adiabatic Logic. International Journal of Computer Sciences and Engineering, [S. l.], v. 2, n. 4, p. 126–130, 2014. Disponível em: https://ijcse.isroset.org/index.php/j/article/view/113. Acesso em: 2 feb. 2026.