A Study of the effect of composite dielectric on the switching behaviour of Junction less Transistor - Ghosal, S; Sikdar, A; Ghosh, D (International Journal of Computer Sciences and Engineering, 2025)
The unremitting drive for faster and smaller devices has also imposed stringent technological constraints on the associated silicon technology. An increased sensitivity to variability in process conditions as well as a need for ultra sharp doping profile has led to the search for alternatives to the conventional Metal Oxide Semiconductor (MOS) Field Effect Transistor (FET) . An obvious alternative is a device architecture that does not have any junctions in the source-channel-drain path. Amongst many advanced MOSFET structures, the Junction-less transistor (JLT) is one such structure which mitigates these requirements while reducing short channel effects because of its excellent scalability. For widespread application in today’s high-speed circuits a key factor would be its effectiveness as a switch. In this work we have studied the relative sensitivity of transient parameters namely the ION/IOFF ratio and gate capacitance have been calculated to variations in several structural parameters of the device namely channel width and doping concentration of the channel. In order to suppress the gate leakage current with continuous thinning of gate oxide layer, gate oxide with high-k materials are being used as a possible solution in MOSFETs. However high-k materials like HfO2 lead to a degradation in mobility due to surface roughness scattering. Therefore we have studied the effect of SiO2 , HfO2 and a gate stack of same EOT and found the gate stack to give a much improved switching performance.