Power Efficient High Speed Domino Circuit Using Adiabatic Logic - Jeeja, Jaculine Let R B; Bharath P; Varatharaj M (International Journal of Computer Sciences and Engineering, 2014)
In this paper, a new domino circuit is proposed, inorder to have lower power consumption.For this proposed technique which is implemented based on adiabatic logic.The proposed circuit technique decreases the parasitic capatance in the dynamic node,to have fast and robust circuits.Thus the leakage current and consecuently power consumption and delay are reduced.Simulation results shown the effeciency and effectiveness of the domino circuit.The domino circuit designed using adiabatic logic will reduce the power consumption.